# Digital-Grand Test -Q4

+1 vote

Assume you need a 64-to-1 multiplexer controlled by 6 select signals A through F, i.e., a binary number ABCDEF specifies the index of the input to be sent to the output. However, as we assume a logic gate can not have more than 8 inputs, such a MUX is not directly available. So you build this 64-to-1 MUX using 4-to-1 mux, such that minimum number of 4-to-1 mux are used.  We build this 64-to-1 MUX using three levels of 4-to-1 MUXs where level 3 has one 4-to-1 mux and its output is the output of the original 64-to-1 mux.

The realization of this 64-to-1 mux using three levels of 4-to-1 muxes is such that Level i (i = 1,2,3) is controlled by $\dpi{100} X_iY_i$ select signals i.e. In level i, the most significant select line of each 4-to-1 mux is connected to $\dpi{100} X_i$ and the least significant control line of each 4-to-1 mux is connected to $\dpi{100} Y_i$.

To select input 27 i.e. (ABCDEF = 011011) and send it to the output, the value of $\dpi{100} X_1Y_1X_2Y_2X_3Y_3$ should be

(A). 011011

(B). 110110

(C). 111001

(D). 100111

asked Jun 10 in Digital
reshown Jun 12

So, $X_1Y_1 \equiv EF ; X_2Y_2 \equiv CD; X_3Y_3 \equiv AB$