Total number of registers = 4
# of bits required = 2
Going by a greedy approach......
LI: 1 bit for opcode and 7 bits for argument to acumulator means total bits for this instruction minimum. Now we have to manage every other instruction in 8 bits somehow.
Therefore LI instruction encoding starts with 1 bit (say 0)
All other instructions will now start with 1
For 3 branch instructions encoding will be:
1, 1, 1 in addition with 5 bit offset. We are now left with 1 as starting encoding for all other instructions.
MOV instruction will have encoding of 0 as starting and in addition with 2+2 bits for registers
Remaining instructions are
all these instructions are take 2 bits for operand ==> Reserve at LSB bits.
remaining size we have = first 4 bits fixed from MSB and Last 2 bits fixed ==> in the middle, we have 2 bits remaining
we have 4 instructions ( i.e., Load,Store,Add,Sub ), which requires 2 Bits ==> fix them
00 ---> ADD
01 ---> SUB
10 ---> Load
11 ---> Store
And hence all encoding done. Total bits required = 8