Addressing modes GATE2011_21

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Consider a hypothetical processor with an instruction of type LW R1 , 20(R2) , which during execution reads a 32-bit word from memory and stores it in a 32-bit
register R1. The effective address of the memory location is obtained by the addition of a constant 20 and the contents of register R2. Which of the following best
reflects the addressing mode implemented by this instruction for the operand in memory?

(A) Immediate addressing
(B) Register addressing
(C) Register Indirect Scaled Addressing
(D) Base Indexed Addressing

I guess the answer should be Base Indexed Adressing mode as content of Register R2 can be taken as Base But amny places answer is given as Option C So what should be the correct answer If Option C then why???
asked Dec 10, 2016 in Computer Organization by hi2saifgmail-com (2,280 points)

1 Answer

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Best answer
It is base indexed addressing
answered Dec 12, 2016 by getgatebook (16,410 points)
selected Dec 14, 2016 by hi2saifgmail-com